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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
July 2006
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Features
Low current - 0.5 mA Superior CTR-2000% Superior CMR-10 kV/s CTR guaranteed 0-70C U.L. recognized (File # E90700) VDE recognized (File # 120915) Ordering option V, e.g., 6N138V Dual Channel - HCPL-2730 HCPL-2731
tm
Description
The 6N138/9 and HCPL-2730/HCPL-2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler. In the dual channel devices, HCPL-2730/HCPL2731, an integrated emitter - base resistor provides superior stability over temperature. The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high fan-out TTL requirements. An internal noise shield provides exceptional common mode rejection of 10 kV/s.
Applications
Digital logic ground isolation Telephone ring detector EIA-RS-232C line receiver High common mode noise line receiver P bus isolation Current loop receiver
Package
Schematic
N/C 1
8 VCC
+1 V
F1
8 VCC
8 1
+2 VF _ 3
7 VB
_2
7 V01
6 VO
_ VF2
3
6 V02
N/C 4
5 GND
+4
5 GND
8 1
8 1
6N138 / 6N139
HCPL-2730 / HCPL-2731
1 (c)2005 Fairchild Semiconductor Corporation Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Absolute Maximum Ratings (TA = 25C unless otherwise specified)
Parameter
Storage Temperature Operating Temperature Lead Solder Temperature (Wave solder only. See recommended reflow profile graph for SMD mounting) EMITTER DC/Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Peak Transient Input Current - (1 s P.W., 300 pps) Reverse Input Voltage Input Power Dissipation DETECTOR Average Output Current Emitter-Base Reverse Voltage Supply Voltage, Output Voltage Each Channel (6N138 and 6N139) (6N138, HCPL-2730) (6N139, HCPL-2731) Output Power Dissipation Each Channel PO IO (avg) VER VCC, VO 60 0.5 -0.5 to 7 -0.5 to 18 100 mW mA V V Each Channel Each Channel Each Channel Each Channel IF (avg) IF (pk) IF (trans) VR PD 20 40 1.0 5 35 mA mA A V mW
Symbol
TSTG TOPR TSOL
Value
-55 to +125 -40 to +85 260 for 10 sec
Units
C C C
Electrical Characteristics (TA = 0 to 70C Unless otherwise specified) Individual Component Characteristics
Parameter
EMITTER Input Forward Voltage Input Reverse Breakdown Voltage
Test Conditions Symbol
TA =25C Each channel (IF = 1.6 mA) (TA = 25C, IR = 10 A) Each Channel BVR (VF/TA) IOH VF
Device
All
Min Typ** Max
1.30 1.7 1.75
Unit
V
All
5.0
20
V
Temperature coefficient of forward voltage (IF = 1.6 mA) DETECTOR Logic high output current (IF = 0 mA, VO = VCC = 18 V) Each Channel (IF = 0 mA, VO = VCC = 7 V) Each Channel Logic low supply (IF = 1.6 mA, VO = Open) (VCC = 18 V) (IF1 = IF2 = 1.6 mA, VCC = 18 V) (VO1 - VO2 = Open, VCC = 7 V Logic high supply (IF = 0 mA, VO = Open, VCC = 18 V) (IF1 = IF2 = 0 mA, VCC = 18 V) (VO1 - VO2 = Open, VCC = 7 V ** All Typicals at TA = 25C
All
-1.8
mV/C
6N139 HCPL-2731 6N138 HCPL-2730
0.01
100
A
0.01
250
ICCL
6N138 6N139 HCPL-2731 HCPL-2730
0.4 1.3
1.5 3
mA
ICCH
6N135 6N136 HCPL-2731 HCPL-2730
0.05 0.10
10 20
A
2 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Transfer Characteristics (TA = 0 to 70C Unless otherwise specified)
Parameter
COUPLED Current transfer ratio (Note 1, 2)
Test Conditions Symbol
(IF = 0.5 mA, VO = 0.4 V, VCC = 4.5 V) Each Channel (IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V) Each Channel (IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V) Each Channel CTR
Device
6N139 HCPL-2731 6N139 HCPL-2731 6N138 HCPL-2730
Min
400
Typ**
1100 3500
Max
Unit
%
500
1300 2500
%
300
1300 2500 0.08 0.01 0.4 0.4
%
Logic low output voltage output voltage (Note 2)
(IF = 0.5 mA, IO = 2 mA, VCC = 4.5 V) (IF = 1.6 mA, IO = 8 mA, VCC = 4.5 V) Each Channel (IF = 0.5 mA, IO = 15 mA, VCC = 4.5 V) Each Channel (IF = 12 mA, IO = 24 mA, VCC = 4.5 V) Each Channel (IF = 1.6 mA, IO = 4.8 mA, VCC = 4.5 V) Each Channel
VOL
6N139 6N139 HCPL-2731 6N139 HCPL-2731 6N139 HCPL-2731 6N138 HCPL-2730
V
0.13
0.4
0.20
0.4
0.10
0.4
** All Typicals at TA = 25C
3 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Switching Characteristics (TA = 0 to 70C unless otherwise specified., VCC = 5 V)
Parameter
Propagation delay time to logic low (Note 2) (Fig. 22)
Test Conditions Symbol
(RL = 4.7 k, IF = 0.5 mA) TA = 25C (RL = 4.7 k, IF = 0.5 mA) Each Channel TA = 25C (RL = 270 , IF = 12 mA) TA = 25C (RL = 270 , IF = 12 mA) Each Channel TA = 25C TA = 25C (RL = 2.2 k, IF = 1.6 mA) Each Channel TA = 25C TPLH Each Channel (RL = 4.7 k, IF = 0.5 mA) TA = 25C Each Channel (RL = 270 , IF = 12 mA) TA = 25C (RL = 270 , IF = 12 mA) Each Channel TA = 25C (RL = 2.2 k, IF = 1.6 mA) Each Channel (RL = 2.2 k, IF = 1.6 mA) TA = 25C Each Channel (RL = 2.2 k, IF = 1.6 mA) TPHL
Device
6N139
Min
Typ** Max Unit
30 4 25 120 3 100 2 0.2 1 3 0.3 2 15 1.5 10 25 1 20 90 s s
HCPL-2731
6N139
HCPL-2730 HCPL-2731 6N138
HCPL-2731 HCPL-2730 6N139 HCPL-2731 6N139 HCPL-2731 6N139
Propagation delay time to logic high (Note 2) (Fig. 22)
(RL = 4.7 k, IF = 0.5 mA)
12 22
60
10 1.3 7 15 5 10 50
HCPL-2730 HCPL-2731 6N138 HCPL-2730/1 6N138 HCPL-2730/1 |CMH| 6N138 6N139 HCPL-2730 HCPL-2731 |CML| 6N138 6N139 HCPL-2730 HCPL-2731 1,000 1,000
7 16 10,000
35
Common mode transient immunity at logic high
(IF = 0 mA, |VCM| = 10 VP-P) TA = 25C, (RL = 2.2 k) (Note 3) (Fig. 23) Each Channel (IF = 1.6 mA, |VCM| = 10 VP-P, RL = 2.2 k) TA = 25C, (Note 3) (Fig. 23) Each Channel
V/s
Common mode transient immunity at logic low
10,000
V/s
** All Typicals at TA = 25C
4 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Isolation Characteristics (TA = 0 to 70C Unless otherwise specified)
Characteristics
Input-output insulation leakage current
Test Conditions Symbol
(Relative humidity = 45%) (TA = 25C, t = 5 s) (VI-O = 3000 VDC) (Note 8) (RH 50%, TA = 25C, II-O 2 A) (Note 4) ( t = 1 min.) (Note 4) (VI-O = 500 VDC) (Note 4, 5) (f = 1 MHz) (RH 45%, VI-I = 500 VDC) (Note 6) t = 5 s, (HCPL-2730/2731 only) (VI-I = 500 VDC) (Note 6) (HCPL-2730/2731 only) (f = 1 MHz) (Note 6) (HCPL-2730/2731 only) II-O
Min
Typ**
Max
1.0
Unit
A
Withstand insulation test voltage Resistance (input to output) Capacitance (input to output) Input-Input Insulation leakage current Input-Input Resistance Input-Input Capacitance
VISO RI-O CI-O II-I RI-I CI-I
2500 1012 0.6 0.005 1011 0.03
VRMS pF A pF
** All Typicals at TA = 25C
Notes 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Pin 7 open. (6N138 and 6N139 only) 3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V). 4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted together. 6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
5 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Electrical Characteristics (TA = 25C unless otherwise specified)
Current Limiting Resistor Calculations R1 (Non-Invert) = VDD1 - VDF - VOL1 IF R1 (Invert) = VDD1 - VOH1 - VDF IF R2 = VDD2 - = VOLX (@ IL - I2) IL CMOS @5V NON-INV. 2000 INV. 510
INPUT R1 (V) CMOS @ 5V R2 (V) CMOS @ 10 V R2 (V) 74XX R2 (V) OUTPUT 74LXX R2 (V) 74SXX R2 (V) 74LSXX R2 (V) 74HXX R2 (V)
1000
2200
750
1000
1000
1000
560
CMOS NON-INV. 5100 @ 10 V INV. 4700 Where: VDD1 - Input Supply Voltage VDD2 - Output Supply Voltage VDF - Diode Forward Voltage VOL1 - Logic "0" Voltage of Driver VOH1 - Logic "1" Voltage of Driver IF - Diode Forward Current VOLX - Saturation Voltage of Output Transistor IL - Load Current Through Resistor R2 I2 - Input Current of Output Gate 74SXX 74LXX 74XX NON-INV. 2200 INV. 180
NON-INV. 1800 INV. 100
NON-INV. 2000 INV. 360
74LSXX NON-INV. 2000 INV. 180
74HXX NON-INV. 2000 INV. 180
Fig. 1 Resistor Values for Logic Interface
VDD1
VDD2
VDD2
1 2 3
IN R1
8 7 6
OUT R1 R2 IN
1 2 3 4
8 7 6 5
R2
OUT
4
5
Fig. 2 Non-Inverting Logic Interface
Fig. 3 Inverting Logic Interface
6 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Fig. 4 LED Forward Current vs. Forward Voltage
100 1.5
Fig. 5 LED Forward Voltage vs. Temperature
IF = 1.6 mA
FORWARD CURRENT - IF (mA)
FORWARD VOLTAGE - VF (V)
TA = 25C TA = -40C 1.2 1.3 1.4 1.5 1.6
10 TA = 85C
1.4
1
TA = 70C
1.3
0.1
1.2
0.01
TA = 0C 0.001 1.0 1.1 1.1 -40 -20 0 20 40 60 80 100
FORWARD VOLTAGE - VF (V)
TEMPERATURE - TA (C)
Fig. 6 Non-saturated Rise and Fall Times vs. Load Resistance (6N138 / 6N139 Only)
100 TA = 25C
Fig. 7 Non-saturated Rise and Fall Times vs. Load Resistance (HCPL-2730 / HCPL-2731 Only)
TA = 25C tf 10
tf
TIME, T (s)
10
TIME - s
tr tr
1 IF ADJUSTED FOR VOL = 2 V 1 0.1 1 10
0.1
1
10
RL - LOAD RESISTANCE (k)
RL - LOAD RESISTANCE (k)
Fig. 8 Propagation Delay To Logic Low vs. Base-Emitter Resistance (HCPL-2730 / HCPL-2731 Only)
TPHL - PROPAGATION DELAY TO LOGIC LOW - (s)
6 IF = 1.6 mA, VCC = 5 V RL = 2.2 K, TA = 25C Normalized to RBE = None
Fig. 9 Current Transfer Ratio vs. Forward Current (6N138 / 6N139 Only)
1600
VCC = 5 V VO= 0.4 V
5
4
CURRENT TRANSFER RATIO - CTR (%)
1200
3
TA = 85C 800
2
TA = 70C 400 TA = -40C 0
0.01 0.1 1 10
TA = 25C TA = 0C
1
0 0.01
0.1
1
10
RBE - BASE-EMITTER RESISTANCE - M
IF - FORWARD CURRENT - mA
7 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Fig. 10 Current Transfer Ratio vs. Base-Emitter Resistance (6N138 / 6N139 Only)
1600
Fig. 11 Current Transfer Ratio vs. Forward Current (HCPL-2730 / HCPL-2731 Only)
5000 VCC = 5 V VO = 0.4 V 4000 TA = 70C TA = 85C TA = 25C 3000 TA = 0C
CTR - CURRENT TRANSFER RATIO (%)
1400
1200
1000
800
CTR - CURRENT TRANSFER RATIO - %
600
2000
TA = -40C
400 IF = 1.6 mA VCC = 5 V VO = 0.4 V 1 10 100 1000
1000
200
0
0
0.1
1
10
100
RBE - BASE RESISTANCE (k)
IF - FORWARD CURRENT - mA
Fig. 12 Output Current vs Output Voltage (6N138 / 6N139 Only)
60 VCC = 5V TA = 25C 50 5 mA 4.5 mA 4 mA 3.5 mA 100 3 mA 120
Fig. 13 Output Current vs Output Voltage
(HCPL-2730 / HCPL-2731 Only)
IF = 5.0 mA IF = 4.5 mA
TA = 25C VCC = 5.0 V IF = 4.0 mA
IO - OUTPUT CURRENT (mA)
IO-OUTPUT CURRENT - mA
IF = 3.5 mA 80 IF = 3.0 mA IF = 2.5 mA 60 IF = 2.0 mA IF = 1.5 mA 40 IF = 1.0 mA
40
2.5 mA
2 mA 30 1.5 mA 20 1 mA 10
20 IF = 0.5 mA
0 0 1 2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VO - OUTPUT VOLTAGE (V)
VO - OUTPUT VOLTAGE (V)
Fig. 14 Output Current vs. Input Diode Forward Current (6N138 / 6N139 Only)
100 100
Fig. 15 Output Current vs Input Diode Forward Current (HCPL-2730 / HCPL-2731 Only)
VCC = 5.0 V VO = 0.4 V TA = 85C
IO - OUTPUT CURRENT (mA)
IO - OUTPUT CURRENT - mA
10
VCC = 5 V VO = 0.4 V 10
1
TA = 25C
TA = 85C 0 TA = 70C TA = 25C TA = 0C TA = -40C 0 0.01
1 TA = -40C
0.1 0.1 1 10 0.1 1 10 100
IF - INPUT DIODE FORWARD CURRENT - mA
IF - INPUT DIODE FORWARD CURRENT - mA
8 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Fig. 16 Logic Low Supply Current vs. Input Diode Forward Current (6N138 / 6N139 Only)
4.0 100
Fig. 17 Logic Low Supply Current vs. Input Diode Forward Current
(HCPL-2730 / HCPL-2731 Only)
TA = 25C
ICCL - LOGIC LOW SUPPLY CURRENT (mA)
3.5
ICCL - LOGIC LOW SUPPLY CURRENT - mA
3.0
HCPL-2731 VCC = 18 V 10 HCPL-2730 HCPL-2731 VCC = 7 V
2.5 VCC = 5 V 2.0 VCC = 18 V 1.5
1
1.0
0.5
0.0 0 2 4 6 8 10 12 14 16
0.1 0.1 1 10 100
IF - FORWARD CURRENT (mA)
IF - INPUT DIODE FORWARD CURRENT - mA
Fig. 18 Propagation Delay vs. Input Diode Forward Current (6N138 / 6N139 Only)
70
Fig. 19 Propagation Delay vs. Input Diode Forward Current
(HCPL-2730 / HCPL-2731 Only)
70
VCC = 5 V TA = 25C
60
VCC = 5 V TA = 25C 60
tP - PROPAGATION DELAY - s
50
tP - PROPAGATION DELAY - s
50 (tPHL) RL = 2.2 k or 4.7 k 40
(tPHL) RL = 2.2 k or 4.7 k
40
30
30 (tPLH) RL = 4.7 k 20 (tPLH) RL = 2.2 k
20
(tPLH) RL = 4.7 k
10
10 (tPLH) RL = 2.2 k
0
0 0 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 10
IF - INPUT DIODE FORWARD CURRENT - mA
IF - INPUT DIODE FORWARD CURRENT - mA
Fig. 20 Propagation Delay to Logic Low vs. Pulse Period (6N138 / 6N139 Only)
100
Fig. 21 Propagation Delay to Logic Low vs. Pulse Period
(HCPL-2730 / HCPL-2731 Only)
100
tPHL - PROPAGATION DELAY to LOGIC LOW - s
6N139 IF = 0.5 mA RL = 4.7 k 10
tPHL - PROPAGATION DELAY to LOGIC LOW - s
10
HCPL-2731 IF = 0.5 mA RL = 4.7 k
6N138 IF = 1.6 mA RL = 2.2 k 1
1
HCPL-2730 HCPL-2731 IF =1.6 mA RL = 2.2k
TA = 25C
TA = 25C 0.1 0.01 0.1 1 10 0.1 0.01 0.1 1 10
T - INPUT PULSE PERIOD - ms
T - INPUT PULSE PERIOD - ms
9 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Fig. 22 Propagation Delay vs. Temperature (6N138 / 6N139 Only)
50 HCPL-2730 : IF = 1.6 mA, RL = 2.2 k HCPL-2731 : IF = 0.5 mA, RL = 4.7 k 40 40 50
Fig. 23 Propagation Delay vs. Temperature
(HCPL-2730 / HCPL-2731 Only)
HCPL-2730 : IF = 1.6 mA, RL = 2.2 k HCPL-2731 : IF = 0.5 mA, RL = 4.7 k
tP - PROPAGATION DELAY - s
tPLH (HCPL-2731) 30
tP - PROPAGATION DELAY - s
tPLH (HCPL-2731) 30
20 tPLH (HCPL-2730)
20 tPLH (HCPL-2730)
10
tPHL (HCPL-2731) tPHL (HCPL-2730)
10
tPHL (HCPL-2731) tPHL (HCPL-2730)
0 0 10 20 30 40 50 60 70 80
0 0 10 20 30 40 50 60 70 80
TA - TEMPERATURE (C)
TA - TEMPERATURE (C)
10 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Pulse Generator IF tr = 5ns Z O = 50 V 10% D.C. I/ f< 100 m s
1 2
VF
Noise Shield
8 7 6 5
VCC
+5 V
Pulse Generator tr = 5ns Z O = 50 V
IF
+
Noise Shield
1
VF1 -
8 7 6 5
VCC RL V01 0.1 F
+5 V
VB
RL
10% DUTY CYCLE I/f < 100 S VO
2
-
VO C L = 15 pF*
3
I F Monitor Rm
VO 0.1 F
IF MONITOR C L = 15 pF* Rm
3 4
V02
VF2 + GND
4
GND
Test Circuit for 6N138, 6N139 IF
Test Circuit for HCPL-2730 and HCPL-2731
VO
5V
1.5 V
1.5 V VOL
TPHL
TPLH
Fig. 22 Switching Time Test Circuit
IF
1 2
A B VFF VF
Noise Shield
8 7 6 5
VCC
+5 V IF
+ VF1 A
Noise Shield
1 2 3 4
8 7 6 5
VCC RL V01 0.1 F
+5 V
VB
RL B VO 0.1 F VFF
VO
3 4
+
VCM
VO
VF2 +
V02
GND
-
GND
-
Pulse Gen
+
VCM -
Pulse Gen Test Circuit for 6N138 and 6N139 VCM 10 V 10% tr 90% 90% 10% tf Test Circuit for HCPL-2730 and HCPL-2731
0V
VO Switch at A : I F = 0 mA VO Switch at B : I F = 1.6 mA
5V
VOL
Fig. 23 Common Mode Immunity Test Circuit
11 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Package Dimensions (Through Hole)
Package Dimensions (Surface Mount)
0.390 (9.91) 0.370 (9.40)
PIN 1 ID.
4 3 2 1
4
3
2
1
PIN 1 ID.
0.270 (6.86) 0.250 (6.35)
5 6 7 8
0.270 (6.86) 0.250 (6.35)
5
6
7
8
0.390 (9.91) 0.370 (9.40)
SEATING PLANE
0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.140 (3.55) 0.020 (0.51) MIN
0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN
0.300 (7.62) TYP 0.016 (0.41) 0.008 (0.20)
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 15 MAX 0.300 (7.62) TYP
0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX
0.045 [1.14] 0.315 (8.00) MIN 0.405 (10.30) MIN
Package Dimensions (0.4"Lead Spacing)
PIN 1 ID.
Recommended Pad Layout for Surface Mount Leadform
4
3
2
1
0.070 (1.78)
0.270 (6.86) 0.250 (6.35)
0.060 (1.52)
5 6 7 8
0.390 (9.91) 0.370 (9.40)
SEATING PLANE
0.100 (2.54)
0.070 (1.78) 0.045 (1.14)
0.295 (7.49) 0.415 (10.54) 0.030 (0.76)
0.200 (5.08) 0.140 (3.55)
0.004 (0.10) MIN
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 0 to 15 0.400 (10.16) TYP
NOTE All dimensions are in inches (millimeters)
12 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
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Ordering Information
Option
S SD W V WV SV SDV
Example Part Number
6N138S 6N138SD 6N138W 6N138V 6N138WV 6N138SV 6N138SDV
Description
Surface Mount Lead Bend Surface Mount; Tape and reel 0.4" Lead Spacing VDE0884 VDE0884; 0.4" lead spacing VDE0884; surface mount VDE0884; surface mount; tape and reel
Marking Information
1
2730 V
3 4
2 6
XX YY T1
5
Definitions
1 2 3 4 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option - See order entry table) Two digit year code, e.g., `03' Two digit work week ranging from `01' to `53' Assembly package code
13 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
Tape Specifications
12.0 0.1 4.90 0.20 0.30 0.05 4.0 0.1 4.0 0.1 O1.55 0.05 1.75 0.10
7.5 0.1 13.2 0.2 10.30 0.20 16.0 0.3
0.1 MAX
10.30 0.20
O1.6 0.1
User Direction of Feed
Reflow Profile
300 Temperature (C) 250 200 150 100 50 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) * Peak reflow temperature: 225C (package surface temperature) * Time of temperature higher than 183C for 60-150 seconds * One time soldering reflow is recommended Time above 183C, 60-150 sec Ramp up = 3C/sec 225 C peak
215 C, 10-30 s
14 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Low Input Current High Gain Split Darlington Optocouplers
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FAST(R) FASTrTM FPSTM FRFETTM
OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM
SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyBoostTM TinyBuckTM TinyPWMTM TinyPowerTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM
UniFETTM UltraFET(R) VCXTM WireTM
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I20
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
15 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.2
www.fairchildsemi.com

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